In case of creating HDL-code in #SublimeText you can integrate simple linter like #Verilator (Free and OpenSource tool):

https://github.com/poucotm/SublimeLinter-contrib-verilator

#lint #verilog #SV

For other RTL-editors you can run #Verilator (as Linter) directly from CLI (customize command args with adding your secret sauce):

verilator --error-limit 100 \
    --default-language 1800-2012 \
    --bbox-sys --bbox-unsup -Wall \
    -Wno-DECLFILENAME \
    -Wno-IGNINC -Wno-IGNDEF \
    -Wno-WIDTH -Wno-STMTDLY \
    -Wno-UNDRIVEN \
    -Wno-PINCONNECTEMPTY \
    -Wno-INPUTPINEMPTY \
    -Wno-OUTPUTPINEMPTY

#lint #verilog #SV

HDL Checker - a language server that wraps VHDL/Verilg/SystemVerilog tools that aims to reduce the boilerplate code needed to set things up. It supports Language Server Protocol or a custom HTTP interface; can infer library VHDL files likely belong to, besides working out mixed language dependencies, compilation order, interpreting some compilers messages and providing some static checks.

https://github.com/suoto/hdl_checker

#HDL #checker #LINT #verilog #VHDL #SV #python

svlint - SystemVerilog linter a tool that providing some static checks (with rule based system).

▫️Source
▫️Rule plugin

#HDL #checker #LINT #verilog #SV #rust
@fpgasic

Verilog-HDL/SystemVerilog/Bluespec support for VS Code

Features
▫️ Syntax Highlighting
◦ Verilog
◦ SystemVerilog
◦ Bluespec SystemVerilog
◦ Vivado UCF constraints
◦ Synopsys Design Constraints
▫️Simple Snippets
▫️Linting support from:
◦ Icarus Verilog
◦ Vivado Simulation
◦ Modelsim
◦ Verilator
▫️Ctags Integration
◦ Autocomplete
◦ Document Symbols Outline
◦ Hover over variable declaration
◦ Go to Definition & Peek Definition
◦ Module Instantiation

https://github.com/mshr-h/vscode-verilog-hdl-support

#VScode #MS #verilog #SV #bluespec #lint snippets #syntax #icarus #modelsim #verilator
@fpgasic

svlint - awesome SystemVerilog linter written in Rust

💾 https://github.com/dalance/svlint
📄 https://github.com/dpretet/dotfiles/blob/master/svlint.toml

#lint #linter #sv #systemverilog #rust
@fpgasic

Versatile list of HDL lint tools

📄 https://airhdl.com/blog/2017/02/08/fpga-lint-tools/
(updated August 2022)

#lint #linter #sv #verilog #vhdl
@fpgasic