FPGš”øSIC
2.13K subscribers
86 photos
12 files
89 links
FPG/A/SIC tips and tricks

#FPGA #ASIC #VHDL #verilog #IP #Xilinx #Altera

PS: also might be intresting @ipcores
Download Telegram
Reusable Integration Framework for FPGA Accelerators (RIFFA) is a simple framework for communicating data from a host CPU to a FPGA via a PCI-E. RIFFA supports Windows/Linux, Altera/Xilinx, with bindings for C/C++, Python, MATLAB and Java.

https://github.com/KastnerRG/riffa
#PCI-E #DMA #Linux
Knowledge base related to Xilinx SoC products contributed by Xilinx staff. Most info useful for SW engineer who use Xilinx SoC:

https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview

#Xilinx #MicroBlaze #ZYNQ #Linux #SoC #MPSoC
Xilt - Command Line Tools for Xilinx Toolchain. Xilt assumes Xilinx ISE WebPack 14.7 is installed and only works on 64-bit Linux systems (this is a deliberate design decision since the ISE isn't officially supported on current versions of Windows).

Xilt can be used to:
ā—¦ Build VHDL, Verilog and mixed mode FPGA projects.
ā—¦ Runs xst, ngdbuild, map, par and bitgen all from one command invocation
ā—¦ Filters output to show errors and warnings while suppressing all other messages
ā—¦ Launch common Xilinx GUI tools (ISE, CoreGen and License Manager) without having to explicitly setup ISE environment paths
ā—¦ Build places all intermediate files into a separate folder to keep your source folders clean

Usage example:
xilt build --device:xc6slx9-2-tqg144 myproj.vhd myproj.ucf

Link:
ā—¦ Package
ā—¦ Sources

#Xilinx #ISE #nodeJS #linux