OpenTimer - a High-Performance Timing Analysis Tool for VLSI Systems.

OpenTimer is a new static timing analysis (STA) tool to help IC designers quickly verify the circuit timing. It is developed completely from the ground up using C++17 to efficiently support parallel and incremental timing.

Features:
▫️Industry standard format (.lib, .v, .spef, .sdc) support
▫️Graph- and path-based timing analysis
▫️Parallel incremental timing for fast timing closure
▫️Award-winning tools and golden timers in CAD Contests

💾 https://github.com/OpenTimer/OpenTimer

#vlsi #asic #sta #statictiminganalysis #circuitanalysis
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