Hiring Alert Looking for Junior Verification Engineer with min 6months of clients Experience, who can join us immediately in Bangalore.

Kindly get in touch anushakonda@mirafra.com Mirafra Technologies

Notice Period: week to Immediate
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MosChip is #hiring #Embedded Developers for
Experience: 1 to 5 years
Location: Hyderabad/Bangalore
Skills:
1. Strong in C Programming
2. Data Structures
3. Linux
4. OS concepts

If interested, drop your updated resume at sneha.sharma@moschip.com
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Greetings from SISOC Semiconductor Technologies Pvt Ltd!!

Hiring for #trained or #intern B TECH/M TECH #freshers 

Eligibility: B Tech/BE (ECE/EEE) (2017,2018 and 2019)/ MTech (VLSI/ECE) (2017,2018,2019,2020 and 2021)in  (Trained or intern)

Open Positions :

1. Design Verification
2.Analog Layout Design

Notice Period : immediate
Job Location:  #bangalore 

Note: Min 6 months of training or internship experience is must in relevant field.

Interested please share across your profiles to:  ssi.sudha@sisocsemi.com
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We are Hiring for Senior DFT Engineer for Semiconductor. 
Location: REMOTE
Job Description:
 Senior DFT engineer with 5 + years’ experience in full chip DFT implementation and verification of scan architectures, JTAG, memory BIST, ATPG. 
2. The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DFT tools and Cadence tools. 
3. The engineer needs to have hands on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF. 
4. Should work independently with minimal support and good communication skills. 
5. The engineer should be able to debug and root cause problem in simulation failures.
Needs immediate joiners.

please let me know and send me your updated resume on karishma.sharma@saracasolutions.com

Regards & Thanks
Karishma
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