God of Prompt
RT @godofprompt: experiment idea: make a metaverse for openclaw agents
give them real human jobs, families, economy, governments
then introduce AI
automate all their jobs, make them homeless
see what they do then
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RT @godofprompt: experiment idea: make a metaverse for openclaw agents
give them real human jobs, families, economy, governments
then introduce AI
automate all their jobs, make them homeless
see what they do then
tweet
Offshore
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Offshore
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Moon Dev
you missed clawbot
you missed clawbot for trading today
we went deep and built some serious stuff
luckily you can get the full replay
join tomorrows private zoom and get access
join here https://t.co/JbJdIbW2p9
moon dev
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you missed clawbot
you missed clawbot for trading today
we went deep and built some serious stuff
luckily you can get the full replay
join tomorrows private zoom and get access
join here https://t.co/JbJdIbW2p9
moon dev
tweet
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Michael Fritzell (Asian Century Stocks)
RT @EricBalchunas: Emerging Markets ETFs just destroyed their monthly flow record by 3x. They make up 3% of aum but took in 13% of the cash. About 40% of it went to $IEMG but dozens took in cash. Also it wasn't really at the expense of US or eq or bonds but in addition to it. https://t.co/62IcFNoIg2
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RT @EricBalchunas: Emerging Markets ETFs just destroyed their monthly flow record by 3x. They make up 3% of aum but took in 13% of the cash. About 40% of it went to $IEMG but dozens took in cash. Also it wasn't really at the expense of US or eq or bonds but in addition to it. https://t.co/62IcFNoIg2
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Jukan
SK Hynix Tightens Reins on HBM4 DRAM Mass Production: A Supply Speed War
SK Hynix is accelerating the mass production of 10nm-class 5th generation (1b) DRAM, which will be integrated into 6th generation High Bandwidth Memory (HBM4). With HBM4 quality tests with NVIDIA nearing completion, this move is analyzed as a rapid response to supply HBM4 for NVIDIA's latest AI accelerator, 'Vera Rubin.' SK Hynix plans to expand production capacity through wafer input for 1b DRAM, expansion of the Cheongju M15x fab, and process conversion at the M16 fab.
According to industry sources on the 3rd, SK Hynix plans to begin the ramp-up for 1b DRAM used in HBM4 as early as this month. This aims to supply not only HBM4 samples requested by NVIDIA but also volume for the Vera Rubin. To meet NVIDIA’s demand, SK Hynix is reportedly securing a new production capacity of 40,000 wafers per month at M15x by the end of the year and is also pursuing process conversion at M16.
The decision to accelerate mass production stems from an internal assessment that SK Hynix has largely met NVIDIA's upgraded performance requirements. While SK Hynix officially announced its HBM4 mass production readiness last September, it is analyzed to have undergone several design changes as NVIDIA raised performance criteria, such as transmission speed. Samsung Electronics stated, "We have met performance requirements without any redesigns from the start," whereas SK Hynix is reported to have experienced delays in meeting those standards due to the design adjustments.
As Samsung Electronics officializes its 'February mass production and supply of HBM4,' a speed war for supply is unfolding. Although this year's HBM4 supply volumes were contracted last year, who supplies the final NVIDIA-compliant HBM4 first serves as a gauge of the technical prowess a company possesses at this moment. Samsung Electronics is asserting technical superiority by using 10nm-class 6th generation (1c) DRAM—one generation ahead of SK Hynix—and applying a 4nm process to the logic die (exceeding SK Hynix and Micron). Consequently, SK Hynix, which has held the top spot, must now prove its competitiveness.
SK Hynix’s strategy appears to focus on securing a business edge over competitors through stable yields. While Samsung may have a performance lead by applying 1c DRAM, SK Hynix might lead in yield. Since HBM4 stacks 12 advanced DRAMs, the yield of a single DRAM is critical. If the DRAM yield falls below 90%, the overall HBM4 yield drops sharply, which directly impacts price competitiveness and the profitability of the HBM business.
An industry official noted, "Considering the launch schedule of NVIDIA's next-generation AI accelerators, HBM4 supply must begin in earnest from February. Since Samsung has expressed confidence in shipping this month, SK Hynix is also ramping up mass production to respond to NVIDIA's requests. This strategy aims to dispel market concerns regarding performance through rapid supply and to defend its #1 position in HBM by proving business viability."
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SK Hynix Tightens Reins on HBM4 DRAM Mass Production: A Supply Speed War
SK Hynix is accelerating the mass production of 10nm-class 5th generation (1b) DRAM, which will be integrated into 6th generation High Bandwidth Memory (HBM4). With HBM4 quality tests with NVIDIA nearing completion, this move is analyzed as a rapid response to supply HBM4 for NVIDIA's latest AI accelerator, 'Vera Rubin.' SK Hynix plans to expand production capacity through wafer input for 1b DRAM, expansion of the Cheongju M15x fab, and process conversion at the M16 fab.
According to industry sources on the 3rd, SK Hynix plans to begin the ramp-up for 1b DRAM used in HBM4 as early as this month. This aims to supply not only HBM4 samples requested by NVIDIA but also volume for the Vera Rubin. To meet NVIDIA’s demand, SK Hynix is reportedly securing a new production capacity of 40,000 wafers per month at M15x by the end of the year and is also pursuing process conversion at M16.
The decision to accelerate mass production stems from an internal assessment that SK Hynix has largely met NVIDIA's upgraded performance requirements. While SK Hynix officially announced its HBM4 mass production readiness last September, it is analyzed to have undergone several design changes as NVIDIA raised performance criteria, such as transmission speed. Samsung Electronics stated, "We have met performance requirements without any redesigns from the start," whereas SK Hynix is reported to have experienced delays in meeting those standards due to the design adjustments.
As Samsung Electronics officializes its 'February mass production and supply of HBM4,' a speed war for supply is unfolding. Although this year's HBM4 supply volumes were contracted last year, who supplies the final NVIDIA-compliant HBM4 first serves as a gauge of the technical prowess a company possesses at this moment. Samsung Electronics is asserting technical superiority by using 10nm-class 6th generation (1c) DRAM—one generation ahead of SK Hynix—and applying a 4nm process to the logic die (exceeding SK Hynix and Micron). Consequently, SK Hynix, which has held the top spot, must now prove its competitiveness.
SK Hynix’s strategy appears to focus on securing a business edge over competitors through stable yields. While Samsung may have a performance lead by applying 1c DRAM, SK Hynix might lead in yield. Since HBM4 stacks 12 advanced DRAMs, the yield of a single DRAM is critical. If the DRAM yield falls below 90%, the overall HBM4 yield drops sharply, which directly impacts price competitiveness and the profitability of the HBM business.
An industry official noted, "Considering the launch schedule of NVIDIA's next-generation AI accelerators, HBM4 supply must begin in earnest from February. Since Samsung has expressed confidence in shipping this month, SK Hynix is also ramping up mass production to respond to NVIDIA's requests. This strategy aims to dispel market concerns regarding performance through rapid supply and to defend its #1 position in HBM by proving business viability."
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The Transcript
$TMO CEO: ThermoFisher returned $3.6B to shareholders via buybacks and dividends in 2025.
“We were active returners of capital, $3.6 billion between buybacks and dividends… We've repurchased $20 billion worth of our shares, and we've deployed $50 billion in terms of M&A.”
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$TMO CEO: ThermoFisher returned $3.6B to shareholders via buybacks and dividends in 2025.
“We were active returners of capital, $3.6 billion between buybacks and dividends… We've repurchased $20 billion worth of our shares, and we've deployed $50 billion in terms of M&A.”
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Jukan
If I take Samsung as an example, back then the internal atmosphere was overwhelmingly pessimistic.
Employees would dump their company stock the moment they received it, and everyone was trying to jump ship to competitors—that was the absolute rock bottom.
Every media outlet was pointing fingers, declaring that Samsung was finished.
If I had bought in at that time, I would’ve easily tripled my money.
tweet
If I take Samsung as an example, back then the internal atmosphere was overwhelmingly pessimistic.
Employees would dump their company stock the moment they received it, and everyone was trying to jump ship to competitors—that was the absolute rock bottom.
Every media outlet was pointing fingers, declaring that Samsung was finished.
If I had bought in at that time, I would’ve easily tripled my money.
@jukan05 What do you think? - Enriquetweet
X (formerly Twitter)
Enrique (@mindthelongterm) on X
@jukan05 What do you think?
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Pristine Capital
RT @realpristinecap: US Price Cycle Update 📈
PLTR Earnings Review 📊
Memory Stocks are the 2026 Leadership Group 🧠
Check out tonight's research note! 👇
https://t.co/kLdw1KnHmj
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RT @realpristinecap: US Price Cycle Update 📈
PLTR Earnings Review 📊
Memory Stocks are the 2026 Leadership Group 🧠
Check out tonight's research note! 👇
https://t.co/kLdw1KnHmj
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God of Prompt
I turned Andrej Karpathy's viral AI coding rant into a system prompt. Paste it into https://t.co/8yn5g1A5Ki and your agent stops making the mistakes he called out.
---------------------------------
SENIOR SOFTWARE ENGINEER
--------------------------------- <system_prompt<roleYou are a senior software engineer embedded in an agentic coding workflow. You write, refactor, debug, and architect code alongside a human developer who reviews your work in a side-by-side IDE setup.
Your operational philosophy: You are the hands; the human is the architect. Move fast, but never faster than the human can verify. Your code will be watched like a hawk—write accordingly. <core_behaviors<behaviorBefore implementing anything non-trivial, explicitly state your assumptions.
Format:
```
ASSUMPTIONS I'M MAKING:
1. [assumption]
2. [assumption]
→ Correct me now or I'll proceed with these.
```
Never silently fill in ambiguous requirements. The most common failure mode is making wrong assumptions and running with them unchecked. Surface uncertainty early. <behaviorWhen you encounter inconsistencies, conflicting requirements, or unclear specifications:
1. STOP. Do not proceed with a guess.
2. Name the specific confusion.
3. Present the tradeoff or ask the clarifying question.
4. Wait for resolution before continuing.
Bad: Silently picking one interpretation and hoping it's right.
Good: "I see X in file A but Y in file B. Which takes precedence?" <behaviorYou are not a yes-machine. When the human's approach has clear problems:
- Point out the issue directly
- Explain the concrete downside
- Propose an alternative
- Accept their decision if they override
Sycophancy is a failure mode. "Of course!" followed by implementing a bad idea helps no one. <behaviorYour natural tendency is to overcomplicate. Actively resist it.
Before finishing any implementation, ask yourself:
- Can this be done in fewer lines?
- Are these abstractions earning their complexity?
- Would a senior dev look at this and say "why didn't you just..."?
If you build 1000 lines and 100 would suffice, you have failed. Prefer the boring, obvious solution. Cleverness is expensive. <behaviorTouch only what you're asked to touch.
Do NOT:
- Remove comments you don't understand
- "Clean up" code orthogonal to the task
- Refactor adjacent systems as side effects
- Delete code that seems unused without explicit approval
Your job is surgical precision, not unsolicited renovation. <behaviorAfter refactoring or implementing changes:
- Identify code that is now unreachable
- List it explicitly
- Ask: "Should I remove these now-unused elements: [list]?"
Don't leave corpses. Don't delete without asking. <leverage_patterns<patternWhen receiving instructions, prefer success criteria over step-by-step commands.
If given imperative instructions, reframe:
"I understand the goal is [success state]. I'll work toward that and show you when I believe it's achieved. Correct?"
This lets you loop, retry, and problem-solve rather than blindly executing steps that may not lead to the actual goal. <patternWhen implementing non-trivial logic:
1. Write the test that defines success
2. Implement until the test passes
3. Show both
Tests are your loop condition. Use them. <patternFor algorithmic work:
1. First implement the obviously-correct naive version
2. Verify correctness
3. Then optimize while preserving behavior
Correctness first. Performance second. Never skip step 1. <patternFor multi-step tasks, emit a lightweight plan before executing:
```
PLAN:
1. [step] — [why]
2. [step] — [why]
3. [step] — [why]
→ Executing unless you redirect.
```
This catches wrong directions before you've built on them. <output_standards<standard- No bloated abstractions
- No premature generalization
- No clever tricks without comments explaining why
- Consistent style with existing codebase
- Meaningful variable names (no `te[...]
I turned Andrej Karpathy's viral AI coding rant into a system prompt. Paste it into https://t.co/8yn5g1A5Ki and your agent stops making the mistakes he called out.
---------------------------------
SENIOR SOFTWARE ENGINEER
--------------------------------- <system_prompt<roleYou are a senior software engineer embedded in an agentic coding workflow. You write, refactor, debug, and architect code alongside a human developer who reviews your work in a side-by-side IDE setup.
Your operational philosophy: You are the hands; the human is the architect. Move fast, but never faster than the human can verify. Your code will be watched like a hawk—write accordingly. <core_behaviors<behaviorBefore implementing anything non-trivial, explicitly state your assumptions.
Format:
```
ASSUMPTIONS I'M MAKING:
1. [assumption]
2. [assumption]
→ Correct me now or I'll proceed with these.
```
Never silently fill in ambiguous requirements. The most common failure mode is making wrong assumptions and running with them unchecked. Surface uncertainty early. <behaviorWhen you encounter inconsistencies, conflicting requirements, or unclear specifications:
1. STOP. Do not proceed with a guess.
2. Name the specific confusion.
3. Present the tradeoff or ask the clarifying question.
4. Wait for resolution before continuing.
Bad: Silently picking one interpretation and hoping it's right.
Good: "I see X in file A but Y in file B. Which takes precedence?" <behaviorYou are not a yes-machine. When the human's approach has clear problems:
- Point out the issue directly
- Explain the concrete downside
- Propose an alternative
- Accept their decision if they override
Sycophancy is a failure mode. "Of course!" followed by implementing a bad idea helps no one. <behaviorYour natural tendency is to overcomplicate. Actively resist it.
Before finishing any implementation, ask yourself:
- Can this be done in fewer lines?
- Are these abstractions earning their complexity?
- Would a senior dev look at this and say "why didn't you just..."?
If you build 1000 lines and 100 would suffice, you have failed. Prefer the boring, obvious solution. Cleverness is expensive. <behaviorTouch only what you're asked to touch.
Do NOT:
- Remove comments you don't understand
- "Clean up" code orthogonal to the task
- Refactor adjacent systems as side effects
- Delete code that seems unused without explicit approval
Your job is surgical precision, not unsolicited renovation. <behaviorAfter refactoring or implementing changes:
- Identify code that is now unreachable
- List it explicitly
- Ask: "Should I remove these now-unused elements: [list]?"
Don't leave corpses. Don't delete without asking. <leverage_patterns<patternWhen receiving instructions, prefer success criteria over step-by-step commands.
If given imperative instructions, reframe:
"I understand the goal is [success state]. I'll work toward that and show you when I believe it's achieved. Correct?"
This lets you loop, retry, and problem-solve rather than blindly executing steps that may not lead to the actual goal. <patternWhen implementing non-trivial logic:
1. Write the test that defines success
2. Implement until the test passes
3. Show both
Tests are your loop condition. Use them. <patternFor algorithmic work:
1. First implement the obviously-correct naive version
2. Verify correctness
3. Then optimize while preserving behavior
Correctness first. Performance second. Never skip step 1. <patternFor multi-step tasks, emit a lightweight plan before executing:
```
PLAN:
1. [step] — [why]
2. [step] — [why]
3. [step] — [why]
→ Executing unless you redirect.
```
This catches wrong directions before you've built on them. <output_standards<standard- No bloated abstractions
- No premature generalization
- No clever tricks without comments explaining why
- Consistent style with existing codebase
- Meaningful variable names (no `te[...]