Engineers! If you are looking for an opportunity to combine your passion for engineering and your management skills, here is the right opportunity for you.
Drop by our office at Tambaram today and tomorrow to see if the dream role is within your reach.
For further details and to share your CV, mail: abdullah.s@e-consystems.com
Drop by our office at Tambaram today and tomorrow to see if the dream role is within your reach.
For further details and to share your CV, mail: abdullah.s@e-consystems.com
Job Title: ASIC DFT Architect: Exp-10+yrs
Location : Bangalore, Hyderabad, Kochi, Pune
Please share your profile to Email ID: remold.vinay@wipro.com
Key Responsibilities:
Interface with ASIC design teams to ensure DFT design rules and coverages are met.
Generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.
MBIST verification (including repair), test pattern generation through Mentor tool.
ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
Work with Product/Test engineering teams on the delivery of manufacturing test patterns for ATE.
Responsible for supporting post-silicon debug effort, issue resolution.
Responsible for Diagnostic Tool generation for ATPG, MBIST and bring-up on ATE.
Developing, enhancing and maintaining scripts as necessary.
Preferred Experience :
Bachelor's degree in Computer Science, Electrical/Electronics Engineering
Minimum of 10+ years' experience in ASIC/DFT - simulation and Silicon validation.
Should have worked in at least one Full chip DFT
Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement.
In-depth knowledge and hands-on experience in ATPG - coverage analysis.
In-depth knowledge of Memory verification, repair and failure root-cause analysis.
Experience with any of these tools is required: ATPG - TestKompress, MBIST - MentorETVerify, Simulation - VCS (preferred), ModelSim.
Expertise in scripting languages such as Perl, shell, etc. is an added advantage.
Ability to work in an international team, dynamic environment with good communication skills.
Ability to learn and adapt to new tools, methodologies.
Ability to do multi-tasking & work on several high-priority designs in parallel.
Please share your profile to Email ID: remold.vinay@wipro.com
Location : Bangalore, Hyderabad, Kochi, Pune
Please share your profile to Email ID: remold.vinay@wipro.com
Key Responsibilities:
Interface with ASIC design teams to ensure DFT design rules and coverages are met.
Generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.
MBIST verification (including repair), test pattern generation through Mentor tool.
ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
Work with Product/Test engineering teams on the delivery of manufacturing test patterns for ATE.
Responsible for supporting post-silicon debug effort, issue resolution.
Responsible for Diagnostic Tool generation for ATPG, MBIST and bring-up on ATE.
Developing, enhancing and maintaining scripts as necessary.
Preferred Experience :
Bachelor's degree in Computer Science, Electrical/Electronics Engineering
Minimum of 10+ years' experience in ASIC/DFT - simulation and Silicon validation.
Should have worked in at least one Full chip DFT
Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement.
In-depth knowledge and hands-on experience in ATPG - coverage analysis.
In-depth knowledge of Memory verification, repair and failure root-cause analysis.
Experience with any of these tools is required: ATPG - TestKompress, MBIST - MentorETVerify, Simulation - VCS (preferred), ModelSim.
Expertise in scripting languages such as Perl, shell, etc. is an added advantage.
Ability to work in an international team, dynamic environment with good communication skills.
Ability to learn and adapt to new tools, methodologies.
Ability to do multi-tasking & work on several high-priority designs in parallel.
Please share your profile to Email ID: remold.vinay@wipro.com
India’s largest IT services provider, Tata Consultancy Services (TCS) is conducting a mega walk-in drive for professionals specializing in Financial Planning & Analysis (FP&A).
Mega Walk-In | TCS Bangalore Hiring
Interview Date: 11th October, 2024 – Friday
Entry Timings: 10:00 AM – 12:30 PM
Venue: Tata Consultancy Services, Think Campus 42, 45-P, Hosur Rd, Phase 2, Bengaluru, Karnataka 560100
Candidates with 4 to 10 years of FP&A experience, particularly in budgeting, variance analysis, forecasting, and reporting, are encouraged to apply.
The role requires expertise in handling capital and revenue expenditures (Capex/Opex), performance management, and MIS reporting.
Job Requirements and Skills
The ideal candidate should be proficient in:
Budgeting, variance analysis, and forecasting: Managing company budgets, forecasting, and performing variance analysis on a monthly and quarterly basis.
Reporting and analysis: Generating complex financial reports, performing variance analysis, and supporting the decision-making process by providing financial insights.
Application Process and EPCN Registration
An EPCN number is mandatory for interview eligibility. Candidates can generate their EPCN by registering on TCS iBegin. After registration, select “BPO” as the area of interest to generate the EPCN number, which starts with EP2024. Ensure the EPCN is included on your resume before attending the interview.
TCS is a leading global IT and business solutions provider with over 614,000 employees across 55 countries and a revenue of USD 27.9 billion (2022-23).
Mega Walk-In | TCS Bangalore Hiring
Interview Date: 11th October, 2024 – Friday
Entry Timings: 10:00 AM – 12:30 PM
Venue: Tata Consultancy Services, Think Campus 42, 45-P, Hosur Rd, Phase 2, Bengaluru, Karnataka 560100
Candidates with 4 to 10 years of FP&A experience, particularly in budgeting, variance analysis, forecasting, and reporting, are encouraged to apply.
The role requires expertise in handling capital and revenue expenditures (Capex/Opex), performance management, and MIS reporting.
Job Requirements and Skills
The ideal candidate should be proficient in:
Budgeting, variance analysis, and forecasting: Managing company budgets, forecasting, and performing variance analysis on a monthly and quarterly basis.
Reporting and analysis: Generating complex financial reports, performing variance analysis, and supporting the decision-making process by providing financial insights.
Application Process and EPCN Registration
An EPCN number is mandatory for interview eligibility. Candidates can generate their EPCN by registering on TCS iBegin. After registration, select “BPO” as the area of interest to generate the EPCN number, which starts with EP2024. Ensure the EPCN is included on your resume before attending the interview.
TCS is a leading global IT and business solutions provider with over 614,000 employees across 55 countries and a revenue of USD 27.9 billion (2022-23).