Electronics Geek | Electrical and Electronics Job Updates / VLSI / embedded
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https://careers.qualcomm.com/careers/job/446705925668

We are hiring at Qualcomm Bangalore !

Looking for Hardware Board Design Engineers with MS/M-Tech 1-2 Years & BE/B-Tech 2-3 Years of experience. M-Tech/ME Freshers with internship in Hardware Board Design can also apply. Understanding of PCB/circuit design is mandatory.
Hello Everyone!!

exciting Opportunities for #VLSI (https://www.linkedin.com/search/results/all/?keywords=%23vlsi&origin=HASH_TAG_FROM_FEED) trained freshers
#Banglore (https://www.linkedin.com/search/results/all/?keywords=%23banglore&origin=HASH_TAG_FROM_FEED)/Hyderabad Location

Qualification : BE/Btech/ME/Mtech (ECE/EEE/EIE) : Year of passing 2015 to 2024.

Trained/Not Trained Freshers candidates in
vlsi domain for below requirement

Verification Engineer
RTL Design Engineer

If you are interested then please share your profile to

komal@onchipspacesemiconductors.com
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Dear Connections,

Xeedo Technologies is hiring for B.E(Fresher).

Education: B.E in ECE/EEE/E&T(Mandatory).
Skills: Basic knowledge on C programming language, Embedded domain, Microcontroller.
Location: Marathahalli, Bangalore, Karnataka.
Eligible Batches: 2023 & 2024 Pass-Outs
IV Mode: F2F
Employment Type: Full-Time

If anyone interested, kindly share your resumes to (leeela@xeedo.in)
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We are Hiring Automation Test Engineer at DeltaIoT Solutions pvt ltd.
Location: Pune
Type: Full Time
Experience: 0-2years
Required Skills :
Programming language: Python with Good Object-Oriented concepts
Protocol & standards: CAN protocol, HIL, SIL & dSPACE, Vector Tools
ISTQB certified engineer
Automotive testing background
Years of experience:0 to 2 years
Qualification:
UG: B.Tech /B.E. – Electrical / Electronics
PG: M.Tech - Electrical / Electronics
Interested candidates, please drop your CVs to indraja.gannu@deltaiot.in
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We have immediate opening for Place and Route CAD Engineer with 2-4 years of experience @AMD Hyderabad. Please share your resume to pramod.sripathi@amd.com

RESPONSIBILITIES:
Responsible for developing Power Grid (PG) construction, macro tapping and Power Grid Augmentation (PGA) flows and methodologies for various designs at 3nm technology nodes
Script out utilities to automate different components of Power Grid construction flows
Support design teams across global sites on various issues related to Power Grid construction.

Tool Expertise Required:
Hands on experience in place and route flows and platforms
Hands on experience in industry standard PnR tools such as Fusion Compiler, ICC2 and Innovus
Hands on experience in any of synthesis, physical verification domains is a plus
Understanding of Low Power Flow concepts
Knowledge of scripting languages like Tcl, Perl/Python and strong debug capabilities
CAD and automation mindset

ACADEMIC CREDENTIALS:
Master’s/Bachelor’s Degree in Electronics Engineering
2-4 years of experience in CAD flow and methodology development on advanced nodes such as 5nm and 3nm
Proficiency in one or more scripting languages namely Tcl, Perl, sed/awk
Work closely with design teams to support multiple areas through GDSII implementation.
Support cross site design teams at various global sites
Strong problem-solving skills and analytical thinking
Team player, good work ethic, and excellent interpersonal skills
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