[niconiconi] EEPROM 里有一个分区表

[niconiconi] 分区表里规定了各分区的属性和权限

[niconiconi] 主板硬件会遵守这个规定。

niconiconi: 换句话说nadebula终于有希望能用上去me的工作站跑gaussian了？

[niconiconi] 另外前一阵子发现 coreboot 虽然硬编码了 Intel 内存控制器的 random seed 不能防御 Cold Boot

[niconiconi] 但是 coreboot 有 row hammering 的防御(!)

[niconiconi] Since the release of Ivy Bridge, Intel Xeon processors support the so-called pseudo target row refresh (pTRR) that can be used in combination with pTRR-compliant DDR3 dual in-line memory modules (DIMMs).

[niconiconi] @Icenowy: 内存发生比特翻转，如果运气不好是会破坏重要数据的……

[niconiconi] 更何况是运行一个主动引发比特翻转的程序……

[niconiconi] https://github.com/google/rowhammer-test

[ttlbot] ⇪标题: GitHub - google/rowhammer-test: Test DRAM for bit flips caused by the rowhammer problem

[niconiconi] @Icenowy: It works on x86 only (either x86-32 or x86-64), because it relies on x86's CLFLUSH instruction for flushing cache lines.

[niconiconi] @Icenowy: 但这个漏洞本身不是 x86 限定的，有一个 JavaScript 写的 PoC 用了启发式算法在多种架构上触发 bit flip.

[niconiconi] > In July 2015, a group of security researchers published a paper that describes an architecture- and instruction-set-independent way for exploiting the row hammer effect.

[niconiconi] https://github.com/IAIK/rowhammerjs

[niconiconi] 谁有兴趣可以试着运行一下

[niconiconi] 但是好像依然是 x86 限定的

[niconiconi] 因为需要根据不同的 CPU 架构微调程序

[niconiconi] 看了看 PoC 只支持 Ivy Bridge 和 Haswell

[ShadowRZ] https://en.wikipedia.org/wiki/FISH_(cipher) 你们对这东西持什么意见？？？

[ShadowRZ] @niconiconi: 其实我是看 PRISM Break 上是有写FiSH加密算法的（IRC客户端）