Latest Published Articles:
Hardware Architecture
#HardwareArchitecture
🗒 SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation
👥 Khaled N. Khasawneh, Esmaeil Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, Nael Abu-Ghazaleh
📗 PDF
🗒 Development of FEB Configuration Test Board for ATLAS NSW Upgrade
👥 Houbing Lu, Feng Li, Peng Miao, Kun Hu, Zhilei Zhang, Rongqi Sun, Qingli Ma, Ge Jin
📗 PDF
🗒 VLSI Design Of Advanced Digital Filters
👥 Rozita Teymourzadeh
📗 PDF
🗒 Static Quantized Radix-2 FFT/IFFT Processor for Constraints Analysis
👥 Rozita Teymourzadeh, Mometo Jim Abigo, Mok Vee Hoong
📗 PDF
🗒 Novel Architecture of Pipeline Radix 2 power of 2 SDF FFT Based on Digit-Slicing Technique
👥 Yazan Samir Algnabi, Furat A. Aldaamee, Rozita Teymourzadeh
📗 PDF
🗒 Characteristic Analysis of 1024-Point Quantized Radix-2 FFT/IFFT Processor
👥 Rozita Teymourzadeh, Memtode Jim, Mok Vee hong
📗 PDF
🗒 FPGA Implementation of pipeline Digit-Slicing Multiplier-Less Radix 2 power of 2 DIF SDF Butterfly for Fourier Transform Structure
👥 Yazan Samir Algnabi, Rozita Teymourzadeh, Masuri Othman, Md Shabiul Islam
📗 PDF
🗒 Mitigating Wordline Crosstalk using Adaptive Trees of Counters
👥 Seyed Mohammad Seyedzadeh, Alex K. Jones, Rami Melhem
📗 PDF
🗒 CMOS: Dynamic Multi-key Obfuscation Structure for Strong PUFs
👥 Jiliang Zhang, Lu Wan
📗 PDF
🗒 Gemini: Reducing DRAM Cache Hit Latency by Hybrid Mappings
👥 Ye Chi
📗 PDF
🗒 Supporting Superpages and Lightweight Page Migration in Hybrid Memory Systems
👥 Xiaoyuan Wang
📗 PDF
🗒 An Efficient Graph Accelerator with Parallel Data Conflict Management
👥 Pengcheng Yao
📗 PDF
🗒 A programmable clock generator for automatic Quality Assurance of LOCx2
👥 Zhi-yue Wang, Tian-kuan Liu, Qi-jie Tang, Yi Feng, Jian Wang
📗 PDF
🗒 LaKe: An Energy Efficient, Low Latency, Accelerated Key-Value Store
👥 Yuta Tokusashi, Hiroki Matsutani, Noa Zilberman
📗 PDF
🗒 Accelerating CNN inference on FPGAs: A Survey
👥 Kamel Abdelouahab, Maxime Pelcat, Jocelyn Serot, François Berry
📗 PDF
#HardwareArchitecture
AI Python & arXiv Channel
Hardware Architecture
#HardwareArchitecture
🗒 SafeSpec: Banishing the Spectre of a Meltdown with Leakage-Free Speculation
👥 Khaled N. Khasawneh, Esmaeil Mohammadian Koruyeh, Chengyu Song, Dmitry Evtyushkin, Dmitry Ponomarev, Nael Abu-Ghazaleh
🗒 Development of FEB Configuration Test Board for ATLAS NSW Upgrade
👥 Houbing Lu, Feng Li, Peng Miao, Kun Hu, Zhilei Zhang, Rongqi Sun, Qingli Ma, Ge Jin
🗒 VLSI Design Of Advanced Digital Filters
👥 Rozita Teymourzadeh
🗒 Static Quantized Radix-2 FFT/IFFT Processor for Constraints Analysis
👥 Rozita Teymourzadeh, Mometo Jim Abigo, Mok Vee Hoong
🗒 Novel Architecture of Pipeline Radix 2 power of 2 SDF FFT Based on Digit-Slicing Technique
👥 Yazan Samir Algnabi, Furat A. Aldaamee, Rozita Teymourzadeh
🗒 Characteristic Analysis of 1024-Point Quantized Radix-2 FFT/IFFT Processor
👥 Rozita Teymourzadeh, Memtode Jim, Mok Vee hong
🗒 FPGA Implementation of pipeline Digit-Slicing Multiplier-Less Radix 2 power of 2 DIF SDF Butterfly for Fourier Transform Structure
👥 Yazan Samir Algnabi, Rozita Teymourzadeh, Masuri Othman, Md Shabiul Islam
🗒 Mitigating Wordline Crosstalk using Adaptive Trees of Counters
👥 Seyed Mohammad Seyedzadeh, Alex K. Jones, Rami Melhem
🗒 CMOS: Dynamic Multi-key Obfuscation Structure for Strong PUFs
👥 Jiliang Zhang, Lu Wan
🗒 Gemini: Reducing DRAM Cache Hit Latency by Hybrid Mappings
👥 Ye Chi
🗒 Supporting Superpages and Lightweight Page Migration in Hybrid Memory Systems
👥 Xiaoyuan Wang
🗒 An Efficient Graph Accelerator with Parallel Data Conflict Management
👥 Pengcheng Yao
🗒 A programmable clock generator for automatic Quality Assurance of LOCx2
👥 Zhi-yue Wang, Tian-kuan Liu, Qi-jie Tang, Yi Feng, Jian Wang
🗒 LaKe: An Energy Efficient, Low Latency, Accelerated Key-Value Store
👥 Yuta Tokusashi, Hiroki Matsutani, Noa Zilberman
🗒 Accelerating CNN inference on FPGAs: A Survey
👥 Kamel Abdelouahab, Maxime Pelcat, Jocelyn Serot, François Berry
#HardwareArchitecture
AI Python & arXiv Channel