What is a driver in VHDL?
https://www.spreaker.com/episode/16877550

Solving a dispute in VHDL: the resolution function

Let’s see a brief introduction to ModelSim simulation

This is the question many of you ask me very often
I wish the give you some hint and a test bench template I use in my VHDL designs

Introducing Flip-Flop in VHDL

Q&A#04- What is the VHDL design flow?

I received a question from Haitham. He have to connect a computer to an FPGA using USB connection in order to transfer data from FPGA to the PC.
Haitham is following my VHDL course “Start Learning VHDL Using FPGA”. In this course the last LAB implement communication between PC and FPGA using UART channel.
After starting the course, Haitham asked me: “Does the USB transfer work as UART”?
Let’s see the answer