The bus width determine the maximum memory capacity of the system

in the address bus The data should be either read from or written to

data should place on output device

data should place on address location

get the data from address location to be placed on the data bus

get the data from Input device to be placed on the data bus

Short

I/O buses are shorter than processor-memory buses

Allow for many types of devices with varying bandwidths

Very design specific

high speed buses closely matched to memory system to maximize bandwidth (transfer of data)

Compatible with many different architecture

Is built into the chassis of the machine

connects the processor, the I/O devices, and the memory

Many computers have a hierarchy of buses (Two or more)

High performance systems often use all three types of buses

Devices are divided into master and slave categories

devices is one that initiates actions

is one that responds to requests by a master

In a very simple system the processor is the only one allowed to be the bus master

It is good in avoiding conflict, but it needs processor to be involved in every transaction uses the bus