Each computer architecture has a predefined set of interrupts

Each interrupt has a corresponding …..

service routine can be also called as a …

The interrupt handler must be executed when the interrupt occurs

The interrupt vector is stored in high memory and holds the addresses of the interrupt service routines (or interrupt handlers).

Interrupt vector holds the addresses of the interrupt service routines (or interrupt handlers).

The interrupt vector is stored in

ROM can be changed

EEPROM can be changed frequently

The main memory (or RAM) is implemented as SRAM

The CPU can load instructions only from the ….

The CPU interacts with RAM using load instructions only

The load instruction moves a word from RAM to a cache Memory

The store instruction moves the content of a CPU register to RAM

The CPU interacts with RAM using … instructions

The store instruction moves the content of … to …

The load instruction moves the content of … to …

getting the instruction from memory and store it in the CPU’s instruction register

…. the instruction, which may require fetching operands from memory and store them in some CPU internal registers

Decoding may require fetching operands from memory

Instruction Execution Cycle